By Ed Sperling
Mentor Graphics won a deal with Fujitsu Semiconductor, which has adopted its SerDes integrity analysis tools for USB 3.0. Just imagine what you can do with speeds of up to 5Gbps.
Synopsys rolled out the latest release of its IC validator, which enables faster physical signoff verification at 20nm and beyond.
Cadence’s DDR4 IP is now proven in silicon using TSMC’s 28HPM process technology. The DDR4 standard is expected to be approved by JEDEC later this year, promising 50% higher operational frequency than DDR3 with reduced power.
Open-Silicon rolled out Ethernet IP it co-developed with CoMira Solutions, which will run at speeds up to 100G. Open-Silicon is offering the IP separately or in combination with Hybrid Memory Cube or DDR3 controllers for networking applications.
Arteris teamed up with Carbon Design Systems for a Carbon Performance Analysis Kit that includes Arteris’ NoC interconnect.
Sonics joined the Heterogeneous System Architecture Foundation to drive open standards for next-generation parallel computing.
Ubiquitous Computing Technology Corp. ported its micro-T-Kernel RTOS to Tenslica’s dataplane processing units, which will be used in a variety of embedded applications such as car infotainment systems and mobile phones.